The present invention relates to a sample and hold network for sampling an input data signal and for periodically providing a sample output signal having a value equal to the value of the input data signal for a predetermined period of time.
Conventional sample and hold circuits, which are illustrated in FIG. 1, usually comprise an input amplifier 1 connected to a sampling switch 2 which may comprise a diode bridge, and a strobe pulse generator 3 which gates the input signal into a holding capacitor 4. The strobe pulse generator has a waveform indicated at FIG. 1b. The sampled and held input signal is then made available to a hold buffer amplifier 5 as shown in the waveform diagram of FIG. 1a. There are a number of limitations inherent in the circuit of FIG. 1. First, in order to charge the hold capacitor, the switch resistance must be low and the current capability high. With a low resistance, however, when the switch is off, it presents a capacitive coupling for the input signal which causes errors due to blowby. Also, the bandwidth of the switch, and the hold amplifier following, must be several times the maximum signal bandwidth because of the spectrum generated by the rectangular high frequency, high current strobe pulses. The strobe pulses must be short and of high frequency, but must also have a high enough current to charge the hold capacitor 4 for brief periods of time. This, in turn, leads to the bandwidth problem identified above.